This document is intended to provide an idea of who preceded (and superseded) who. Please message me comments, corrections, and so on.
The seventies were a good time for intel, mostly because they were the first players in the game. Motorola jumped in rapidly thereafter, however, and brought out the ubiquitous 6800 and later the even more important 68000 during the same timeframe. Even today, however, 808x CPUs are more popular in embedded systems than the more powerful Motorola 68000, if for no other reason than inertia. Intel got there first, and got the ball rolling. A great deal of their installed base comes from the fact that the IBM PC and every clone of it thereafter carried an intel CPU.
IBM also invented the first RISC CPU during this decade (barely). They began work on it way back in 1975. That chip was never released but concepts in its design made it all the way into the PowerPC by way of ROMP and then POWER.
1971: 4004 (intel) Used in the Busicom calculator. First microprocessor. 4 bits, 2300 transistors, 740 kHz, 0.06 MIPS.
1972: 8008 (intel) Used in the Mark-8.
1974: 8080 (intel) Used in the Altair.
1974: MC6800 (Motorola) Easier to implement than intel 8080 as it needs only one voltage and no support chips to operate. Mostly sold for peripheral and industrial control.
1975: MC6501 (MOS) Pin-compatible with Motorola MC6800, leading to a lawsuit against MOS.
1975: MC6502 (MOS) Replaces the 6501, and is not pin-compatible with MC6800. Used in Apple 2 and Commodore VIC 20. MOS Technology was purchased by Commodore later the same year.
1976: 8085 (intel) Improved version of the 8080; uses only +5V, where 8080 needs several voltages, and with additional instructions as well.
1976: TMS9900 (TI) First 16 bit microprocessor.
1976: Z80 (Zilog) The Z80’s instruction set is a superset of the intel 8080. It later becomes one of the most ubiquitous embedded processors of all time. The de facto standard for computers running CP/M. Also featured in the Radio Shack TRS-80 and the Nintendo Game Boy, among many others.
1978: 8086 (intel) Used (later) in the IBM PC. Also, the complementary 8087 math coprocessor.
1979: 8088 (intel) Cost reduced 8086, with an 8 bit bus instead of 16 bit.
1979: 801 (IBM) First RISC CPU made. Never commercialized.
1979: Z8000 (Zilog) 16 bit chip.
1979: MC68000 (Motorola) 16 bit processor with 24 bit addressing.
The 1980s, the digital age. This is the time when everything exploded. All the chips we love (and love to hate) were born here — the 286 (possibly intel’s most crippled chip in its time); the 68020 which was not only a big step forward from the 68000 for its instruction set, but also for being the first 32 bit processor; The ARM CPUs (including the first marketed RISC processor); The 386 and 486 which brought PCs into the 32 bit era; As well as RISC products from Sun (Sparc), MIPS (R3000), and IBM (ROMP).
The beginning of this decade is also when the first clones of intel CPUs began to appear; NEC brought out the V20 and V30, which are drop-in replacements. The prior Zilog Z80 (1976) executed intel 8080 instructions but was not a direct replacement for the 8080.
1981: 80186 and 80188 (Intel) x86-compatible, primarily used in embedded systems as they contain DMA and timer circuits.
1982: 80286 (intel) Used in the IBM PC-AT. (February 1, 1982)
1982: MC68010 (Motorola) Update of MC68000.
1984: MC68020 (Motorola) The world’s first true 32-bit microprocessor.
1984: V20 and V30 (NEC) First clones of intel’s 8088 and 8086, respectively.
1985: ARM1 and ARM2 (Acorn) ARM2 was the first commercially available RISC processor. ARM1 is also RISCish, but never made it to market.
1985: R2000 (MIPS) First commercially available MIPS processor.
1986: 80386 (intel). x86 goes 32 bit.
1986: ROMP (IBM) RISC processor used in the IBM RT PC, a business system which failed in part because of its name (“personal computer”). Successor of IBM 801, predecessor of IBM POWER architecture which eventually lead to PowerPC.
1986: Sparc (Sun, LSI Logic, Fujitsu) SPARC Version 7 (first release.) SPARC is a UC Berkeley-derived design.
1987: MC68030 (Motorola) 32 bit processor with 32 bit address bus, used in Macintosh, Sun, and Amiga computers (among many others.)
1988: R3000 (MIPS) 32 bit processor, used in many SGI systems, and among other things, the original Sony Playstation.
1988: 80386SX (Intel) Cheaper alternative to the 386DX, it uses a 16 bit time-multiplexed bus to perform 32 bit data transfers (in two cycles) at a cost in memory bandwidth. (June 16, 1988)
1989: 80486 (intel) New 32 bit processor, and the last Intel-made x86 processor that is not internally RISC. (April 10, 1989)
1989: i860 (intel) System-on-a-chip with a 32 bit RISC processor with 64 bit data types and an integrated graphics accelerator (today known as a GPU) which performed texturing and shading. The original target for Windows NT and in fact the place from which that operating system derived its name.
1989: ARM3 (Acorn)
This is where home computers began to really have the “juice” to wow people. The MIPS R4000 fueled high-end Unix workstations which were busy making movies. IBM and Motorola got together and with input from Apple began work on and realized their new PowerPC architecture. Intel brought out the Pentium followed by the Pentium MMX, Pentium 2, and the Pentium 3, and all were huge hits.
AMD got into the high-power game with several RISC CPUs which would interpret x86 instructions: K5, K6, and Athlon. The Athlon got them into a serious battle with intel over CPU supremacy, which pretty much brings us to our current situation – Everyone making a significant CPU today has enough power to stay in the race.
1990: RS6000 (IBM) POWER architecture chip, predecessor of PowerPC CPU. Partitioned RISC design lends itself to superscalar processing – this is the first superscalar processor, capable of executing multiple instructions at once.
1990: Motorola MC68040, the successor to the MC68030.
1991: Am386 (AMD) Breaks the intel 32 bit x86 monopoly.
1991: R4000 (MIPS) First 64 bit processor.
1991: 486SX (Intel) 486 processor with no onboard FPU. Introduced as a low-cost budget processor; originals are actually remarked 486DX chips with faulty FPUs disabled. (April 22, 1991)
1992: MCP601 (IBM) First-generation PowerPC chip, aka Motorola PPC601. Motorola will make them in 1993.
1992: Alpha 21064 (Digital) 64 bit processor, considered to be one of the fastest chips for floating point mathematics.
1992: SuperSPARC I (Sun, Texas Instruments) First multi-scalar RISC chip with SMP capability, support for 1-2MB L2 cache.
1992: MicroSPARC I (Sun, Texas Instruments) Cost-Shrunk SuperSPARC I for lower-end systems.
1993: Pentium P54C (intel) Intel begins to use some RISC style processing. First superscalar x86-family processor.
1993: Am486 (AMD)
1993: POWER2 (IBM) Second generation POWER architecture (Developed alongside MCP601)
1993: PowerPC 603 (IBM and Motorola) Drops some POWER architecture features in the 601, runs significantly faster.
1993: R4400 and R4600 (MIPS) Larger-cache R4000. R4600 is a speed-bumped part.
1993: HyperSPARC (Ross) SPARC Version 9, higher-speed/performance SPARC part with a snazzy integrated heat sink.
1993: SPARC power microP (Weitek) Clock-doubled SPARC upgrade part primarily for SparcStaton 2s and SparcStation IPX]s.
1994: PowerPC 604 and 620 (IBM). 620 is the first 64 bit implementation of PowerPC (as opposed to POWER).
1994: R8000 (MIPS) First superscalar MIPS design.
1994: 68060 (Motorola) Last entry in the 680×0 line, a very RISC-ish 32 bit processor with “2 to 3 times the performance capabil
ity of the 68040 at the same clockrate.”15
1995: Pentium Pro (intel) A great deal of added cache. Sets the stage for the Pentium 2 (whose design is largely based on the PPro) and Pentium MMX (P55C).
1995: SPARC64 (HAL Computer/Fujitsu) First 64-bit SPARC processor.
1995: SuperSparc 2 (Sun)
1995: UltraSparc I (Sun) 64-bit SPARC processor, introduces crossbar architecture (“UPA”)
1995: StrongARM (ARM+Digital) RISC chip intended for embedded systems, somewhat based on the ARM architecture. Owned by Digital, who got bought by Compaq, who sold the StrongARM to intel (the current owner).
1995: R10000 (MIPS)
1996: R5000 (MIPS) Budget (for MIPS) CPU designed for 3D applications.
1996: K5 (AMD) AMD’s first Internally-RISC x86-compatible processor. Basically a 486 on steroids, and intended to compete with the Pentium. (March 27, 1996)
1997: Pentium MMX P55C (Intel) Pentium with MMX added.
1997: Pentium 2 (Intel) Based on the Pentium Pro, and carrying the MMX features of the P55C. First x86 processor on a module, with L2 cache on the PC board. (All former x86 CPUs utilize L2 cache on the motherboard.)
1997: K6 (AMD) First Pentium 2 competitor, based on a RISC design with an x86 translation layer. Suffers due to slow and incompatible (24 as opposed to 32 bit) FPU. (April 2, 1997)
1997: UltraSPARC II (Sun et al.)
1998: Pentium 2 Xeon (Intel) Where the P2’s L2 cache runs at half speed, the Xeon’s runs at full speed, and is available from 512kb to 8mb.
1998: Pentium 2 Deschutes (Intel) Process shrink to .25µm.
1998: PowerPC 750 (AKA G3) (Apple, IBM and Motorola)
1998: K6-2 (AMD) Updated version of K6 CPU with multimedia functions (“3DNow!”) and a 32-bit FPU. (May 28, 1998)
1999: Celeron (Intel) Bargain version of the Pentium 2. Early versions have no L2 cache; Later versions have a reduced amount of L2 (128kb) which runs at full speed rather than the P2’s half speed.
1999: Pentium 3 (Intel) Based on the P2’s design, new core. Substantially faster than P2. Adds additional SIMD extensions beyond MMX.
1999: Athlon (AMD) AMD’s competitor to Pentium 2. Features 100MHz DDR bus for three times the bus bandwidth of intel CPUs (compared to then-current 66MHz Pentium 2 bus.) Intel Pentium chipsets later feature 100MHz bus (non-DDR.)
1999: PowerPC 7xxx line (AKA G4) (IBM and Motorola)
1999: K6-3 (AMD) Last revision in K6 line, improves speed of multimedia functions and makes new clock rates available.
Or whatever you would like to call them
Now, in the 21st century, the race continues. AMD and intel have essentially equivalent juggernauts which for the first time (Beginning in the 90s with the coexistence of Pentium 3 and Athlon) compete directly and strongly with one another. Meanwhile, both companies have 64 bit designs with instruction sets based on x86, and the outcome of that match is as unclear as the outcome of Pentium 4 vs. Athlon XP.
Meanwhile everyone else has already gone 64 bit (MIPS, Sparc) or is about to go 64 bit (PowerPC). It looks like the 21st century will be the age of the quad word.
2000: Pentium 4 (Intel) Less efficient than P3 cycle for cycle, with a harsher penalty for incorrect branch prediction (due to a longer pipeline), but supports much higher clock rates (mostly due to the longer pipeline.) Bus speeds increase to as much as 533MHz in order to compete with AMD’s Athlons.
2000: Athlon XP and Athlon MP (AMD) Full speed L2 cache, and a new 133MHz DDR bus (equivalent to 266MHz.) MP is “designed” for multiprocessor use.
2000: Crusoe TM5400 and TM5600 (Transmeta). Crusoe is a “code-morphing” processor which uses dynamic JIT recompilation to run code designed for other processors, though to date only the intel x86 instruction set is supported.
2001: itanium (Intel) Intel’s first 64 bit CPU. Low clock rates (through 2002) but true 64 bit. Explicitly Parallel Instruction Computing (EPIC). Uses a new instruction set, IA-64, which not is based on x86. Extremely poor at emulating x86.
2001: Crusoe TM5500 and TM5800 (Transmeta)
2001: UltraSPARC III (Sun et al.)
2002: itanium 2 (Intel) Supports higher clock rates than itanium and has a shorter pipeline to reduce the cost of a bad branch prediction.
2002: XScale (Intel) StrongARM II. Tight, fast embedded processor which uses the ARM instruction set. Based on StrongARM, which was purchased from Compaq after they acquired Digital, who made the chip in conjunction with Acorn. (See StrongARM, above.)
2002: R16000 (SGI) MIPS 4 architecture, 64KB L1 and 4MB L2 cache, and with out-of-order execution (OoO.)
2002: SPARC64 V (Sun et al.)
2003: Opteron/Athlon 64 (AMD) AMD’s x86-64 processors, collectively code named “Hammer”. Opteron has more cache and two hypertransport (HT) links per CPU, allowing for glue-less SMP; Athlon 64 has one. A mobile (low power) version is also available. There are a number of revisions, starting with “ClawHammer” (130nm) Memory controller is on-die, so hypertransport only has to handle communication with peripherals, and memory attached to other CPUs. (NUMA architecture.)
2003: PowerPC 9xx/G5 (IBM) 64 bit PowerPC processor. The G5 in the Power Macintosh is the 970.
2003: Pentium M (Intel) See also: Centrino. Formerly code-named Banias, this is an advanced low-power rehash of the Pentium 3 processor, more efficient than Pentium 4. Intel announced that multi-core Pentium M processors would take over for the P4, whose scalability is running out.
2003: V-Dragon (China, IBM) 32 bit RISC chip designed at the Chinese Academy of Science with help from IBM clocked at around 200-260MHz intended to break China’s dependence on foreign processors. Targeted at embedded systems (and low-power desktops with Midori Linux.)
2004: POWER5 (IBM) 64 bit POWER processor.
2004: Athlon XP-M (AMD) Low-power version of the Athlon XP processor, the slowest (2700+) part draws 35W with 512kB L2 cache.
2004: UltraSPARC IV (Sun et al.) First 64 bit dual-core processor.
2005: Athlon 64 X2 (AMD) First dual-core 64 bit x86-compatible processor.
2005: UltraSPARC IV+ (Sun et. al.)
2006: UltraSPARC T1 (Sun et. al.) First 8-core CMT system.
2007: UltraSPARC T2 (Sun et. al.) 8 cores x 8 threads.
CPUs which are in the future, IE those which have not seen final silicon are not listed here.
Things for which I still need a first release date:
* Motorola MC68060
And probably others. Your input is invited.
1. Intel Microprocessor Hall of Fame. Intel Corp.(http://www.intel.com/intel/intelis/museum/exhibit/hist_micro/hof/hof_main.htm)
2. AMD History. AMD. (http://www.amd.com/us-en/Corporate/AboutAMD/0,,51_52_533,00.html)
3. Webpage: Motorola History. Motorola. (http://www.motorola.com/content/0,1037,115-110,00.html)
4. Timeline of Microcomputers. pcbiography.net. (http://www.fortunecity.com/marina/reach/435/comphist.html)
5. 25 Years of the Microprocessor. Thinkquest. (http://library.thinkquest.org/13714/netscape3/time.htm)
6. SGIStuff: Processors. Gerhard Lenerz, 2001-2002. (http://sgistuff.g-lenerz.de/processors.html)
7. Great Microprocessors of the Past and Present. John Bayko, March 2002. (http://www3.sk.sympatico.ca/jbayko/cpu.html)
8. E2Nodes ARM1, ARM2 and ARM3 (Writeups by alisdair)
9. E2Node StrongARM (Writeup by call)
10. Email from Phillip Bergman of Transmeta, October 25, 2002
11. MIPS architecture. Wikipedia, the free encyclopedia, October 2003. (http://en.wikipedia.org/wiki/MIPS_architecture)
12. Jon “Hannibal” Stokes, Understanding Pipelining and Superscalar Execution. Ars Technica, 2003. (http://www.arstechnica.com/paedia/c/cpu/part-2/cpu2-4.html)
13. Halfhill, Tom R., MIPS R5000: fast, Affordable 3-D. Byte Magazine, May 1996, pp 161-162. (Web: http://www.byte.com/art/9605/sec14/art1.htm)
14. wlaote, AMD/Intel CPU release date graph. Ace’s Hardware Forums, April 26, 20
15. “Motorola 68060.” Wikipedia, The Free Encyclopedia. 22 Jun 2006, 07:58 UTC. Wikimedia Foundation, Inc. 30 Jun 2006 .
16. “Timeline of computing 1990-forward.” Wikipedia, The Free Encyclopedia. 20 Jun 2006, 18:29 UTC. Wikimedia Foundation, Inc. 30 Jun 2006 .
17. “Timeline of computing 1950-1979.” Wikipedia, The Free Encyclopedia. 20 Jun 2006, 14:46 UTC. Wikimedia Foundation, Inc. 30 Jun 2006 .
18. “List of AMD Athlon 64 microprocessors.” Wikipedia, The Free Encyclopedia. 14 Jun 2006, 13:56 UTC. Wikimedia Foundation, Inc. 30 Jun 2006 .
19. “The History of SPARC.” Sun Microsystems, August 2007.
20. Koch(?), Peter. “History of the Sun4 Series.” 2008.
21. Kerekes, Zsolt (ed.) “History of SPARC systems.” SPARC Product Directory, June 5, 2008.
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